Vasileios Tsoutsouras

  • 8 posts
The Data Conversion Bottleneck in Analog Computing Accelerators
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The Data Conversion Bottleneck in Analog Computing Accelerators
The Laplace Microarchitecture for Tracking Data Uncertainty

Vasileios Tsoutsouras , Orestis Kaparounakis, Chatura Samarakoon, Bilgesu Bilgin , James Meech, Jan Heck , and Phillip Stanley-Marbell. IEEE Micro Top Picks 2022.      
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The Laplace Microarchitecture for Tracking Data Uncertainty
The Laplace Microarchitecture for Tracking Uncertainty and Its Implementation in a RISC-V Processor

Vasileios Tsoutsouras, Orestis Kaparounakis, Bilgesu Bilgin, Chatura Samarakoon, James Meech, Jan Heck, and Phillip Stanley-Marbell. To appear, 54th ACM/IEEE International Symposium on Microarchitecture (MICRO-54).      
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The Laplace Microarchitecture for Tracking Uncertainty and Its Implementation in a RISC-V Processor
Drap: A Python Library for Representing and Computing with Arbitrary Empirical Probability Distributions

Chatura Samarakoon, Bilgesu Bilgin, Orestis Kaparounakis, Vasileios Tsoutsouras, and Phillip Stanley-Marbell. Under review, ACM Transactions on Mathematical Software (TOMS).      
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Drap: A Python Library for Representing and Computing with Arbitrary Empirical Probability Distributions