The Laplace Microarchitecture for Tracking Uncertainty and Its Implementation in a RISC-V Processor

The Laplace Microarchitecture for Tracking Data Uncertainty and Its Implementation in a RISC-V Processor | MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture

ACM Digital Library homeVasileios Tsoutsouras University of Cambridge, Signaloid, United Kingdom

Abstract

We present Laplace, a microarchitecture for tracking machine representations of probability distributions paired with architectural state. We present two new methods for in-processor distribution representations which are approximations of probability distributions just as floating-point number representations are approximations of real-valued numbers. Laplace executes unmodified RISC-V binaries and can track uncertainty through them. We present two sets of ISA extensions to provide a mechanism to initialize distributional information in the microarchitecture and to allow applications to query statistics of the distributional information without exposing the uncertainty representations above the ISA.


We evaluate the accuracy and performance of Laplace using a suite of 21 benchmarks spanning domains ranging from variational quantum algorithms and sensor data processing to materials properties modeling. Monte Carlo simulation on the benchmarks requires 2 076× more instructions on average (and up to 21 343× in some cases) to achieve the same accuracy that Laplace can achieve in a single execution. Compared to state-of-the-art alternatives to Monte Carlo, Laplace achieves an average 1.3× accuracy improvement versus PaCAL [22] and more than 4.6× accuracy improvement versus the method used by the NIST Uncertainty Machine [26], quantified using the Wasserstein distance to Monte Carlo.


Unlike existing methods for uncertainty tracking which require software to be rewritten in a domain-specific language or extensive source-level changes, Laplace achieves all of these benefits while requiring no changes to existing binaries in order to track uncertainty through them, with only minimal changes required to get uncertainty information into the microarchitecture. We have deployed an implementation of Laplace as a commercial product in the form of a cloud-accessible virtual machine.

Cite as:

Vasileios Tsoutsouras, Orestis Kaparounakis, Bilgesu Bilgin, Chatura Samarakoon, James Meech, Jan Heck, and Phillip Stanley-Marbell. 2021. The Laplace Microarchitecture for Tracking Data Uncertainty and Its Implementation in a RISC-V Processor. In MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO '21). Association for Computing Machinery, New York, NY, USA, 1254–1269. DOI:https://doi.org/10.1145/3466752.3480131

BibTeX:

@inproceedings{10.1145/3466752.3480131,
        author = {Tsoutsouras, Vasileios and Kaparounakis,
                Orestis and Bilgin, Bilgesu and Samarakoon,
                Chatura and Meech, James and Heck, Jan 
                and Stanley-Marbell, Phillip},
        title = {The Laplace Microarchitecture for Tracking 
                Data Uncertainty and Its Implementation in a 
                RISC-V Processor},
        year = {2021},
        isbn = {9781450385572},
        publisher = {Association for Computing Machinery},
        address = {New York, NY, USA},
        url = {https://doi.org/10.1145/3466752.3480131},
        doi = {10.1145/3466752.3480131},
        booktitle = {MICRO-54: 54th Annual IEEE/ACM 
                International Symposium 
                on Microarchitecture},
        pages = {1254–1269},
        numpages = {16},
        keywords = {RISC-V, arithmetic on distributions,
                distributional representations, 
                uncertainty tracking},
        location = {Virtual Event, Greece},
        series = {MICRO '21}
}